The semiconductor integrated circuit package having a plurality of leads located on a surface of the semiconductor integrated circuit chip or a substrate, is sometimes called as "lead- on- chip" or "lead- over-chip" (LOC) type package. Typical structure of the LOC type package is shown in FIG. 1.
Referring to FIG. 1, the LOC type package includes an integrated circuit chip 1 and a lead frame 2 attached on a surface of the integrated circuit chip 1 by an adhesive 6. The lead frame 2 comprises inner leads 21 for carrying the signals to the chip 1 and outer leads 22 which are electrically connected with an exterior device such as the printed circuit board. The inner leads 21 are electrically connected with bond pads of the chip 1 by metal wires 5 such as gold wires. The chip 1 and inner leads 21 are encapsulated in a plastic mold 3.
The LOC type package is advantageous in that it has reduced thickness and the crack phenomena are basically prevented from occurring.
However, the LOC type package has asymmetrical structure, in particular in its vertical direction. This is attributed to non-smooth flow of the mold 3 during the molding process. When flow of the mold 3 is not smooth, package warpage leading to package failure may be generated and voids can be formed in the mold 3. Moreover, the LOC type package shown in FIG. 1 is slow in carrying the signals, because the electrical connection between the chip 1 and inner leads 21 is accomplished by the metal wires 5. In addition, the LOC type package shown in FIG. 1 has a shortcoming that the resistance of solder joints of the outer leads to a substrate is low because lead height LH is low. Additionally, the LOC type package shown in FIG. 1 is not easy in dissipating heat generated from the chip 1.